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Download Principles of Functional Verification epub

by Andreas Meyer

As design complexity in chips and devices continues to rise, so, too, does the demand for functional verification. Principles of Functional Verification is a hands-on, practical text that will help train professionals in the field of engineering on the methodology and approaches to verification. In practice, the architectural intent of a device is necessarily abstract. The implementation process, however, must define the detailed mechanisms to achieve the architectural goals. Based on a decade of experience, Principles of Functional Verification intends to pinpoint the issues, provide strategies to solve the issues, and present practical applications for narrowing the gap between architectural intent and implementation. The book is divided into three parts, each building upon the chapters within the previous part. Part One addresses why functional verification is necessary, its definition and goals. In Part Two, the heart of the methodology and approaches to solving verification issues are examined. Each chapter in this part ends with exercises to apply what was discussed in the chapter. Part Three looks at practical applications, discussing project planning, resource requirements, and costs. Each chapter throughout all three parts will open with Key Objectives, focal points the reader can expect to review in the chapter. * Takes a "holistic" approach to verification issues* Approach is not restricted to one language* Discussed the verification process, not just how to use the verification language
Download Principles of Functional Verification epub
ISBN: 0750676175
ISBN13: 978-0750676175
Category: Engineering
Subcategory: Engineering
Author: Andreas Meyer
Language: English
Publisher: Newnes; 1 edition (November 5, 2003)
Pages: 216 pages
ePUB size: 1724 kb
FB2 size: 1427 kb
Rating: 4.5
Votes: 130
Other Formats: doc lrf docx mbr

Hilarious Kangaroo
Although well written and useful for its target application, "Principles of Functional Verification" addresses only the concerns of 100% digital integrated circuit verification. It is only marginally useful for mixed signal system-on-chip verification.

Now there's an opportunity for a book!
This is a great book for the college student, co-op/intern, or any engineer or manager new to the field of DV (Design Verification). I could easily see a college course being built around this book. Although the seasoned verification engineer may not find much in the way of new information in this book, it may provide insite into why others in your team, group, company, or industry don't quite do things the same way you would. One of the greatest dangers in this, as in any field, is zealotry (bordering on facism) for a particular verification methodology above all others.

Meyer has done a brilliant job of capturing the various approaches to functional verification without any bias toward one methodology. He, in fact, deserves credit for stressing that there is no single verification methodology that fits all engineering needs. In 10 years of experience in FPGA design and verification I find that it often takes a blend of approaches to achieve confidence in your verification environment.

He also deserves much credit for divorcing the concepts of functional verification from any one language or tool set. In fact you don't need to know the syntax for any verification language or have experience with any particular simulation tool suite to read and understand this book.

If there is one complaint I have, it is that the price of this book is a little too steep; espcially for a soft-cover book with small pages and large print (thus my four-star rating). Perhaps, though, this is just my experience speaking. It would be well worth the money if I were just starting out in the field.
Instead of attempting to teach you the "howtos" of functional verification this book teaches you the "whys". This causes it to be much less like a textbook than many others on the same subject. Therefore reading this book cover to cover is relatively easy and useful. Examples given are at the appropriate level of complexity - neither too simple nor too complex.
Readers of this book could easily range from senior management to test coders. Senior management would learn the purposes behind various aspects of functional verification and why the cost and complexity continues to rise. Engineers would be exposed to the reasoning behind the use of some functional verification techniques.
Each chapter discusses the ideas behind some aspects of functional verification with examples of how this might be used in an actual system being verified. There are few code examples since that would not contribute to the purpose of the book. The examples are primarily system architectures and how a specific component of functional verification would be used in testing that architecture.
The list of subjects covered is complete relative to the current state of the art.
Overall this is a very useful book to read. I would suggest that most verification engineers and their managers would benefit from exposure to this book. Even if you know all of this already it is a good book to have available to explain to other people what you are doing.
Meyer's book starts with basic concepts of functional verification and gradually introduces you to more advanced topics such as constrained random testing and hardware/software co-simulation techniques. This is a very good book for design engineers and project managers who would like to quickly get up-to-speed on ASIC/SoC functional verification concepts and advanced techniques. For experienced ASIC/SoC verification engineers, this is a good book to refresh your memory on the topic.
Meyer jumps to the heart of advanced verification issues. I have 12 years experience in functional verification and this book provides good information about all the advanced verification topics haunting designers of SoCs today, like, verification reuse, coverage, assertions, testbench development, etc. We bought one for everyone in our group.